The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 03, 2010
Filed:
Jun. 29, 2007
Hye-young Lee, Kyoungki-do, KR;
Hye-Young Lee, Kyoungki-do, KR;
Hynix Semiconductor, Inc., Gyeonggi-do, KR;
Abstract
A delay locked loop (DLL) of a semiconductor device includes: a first delay line for delaying a first clock signal in synchronization with a first edge of an external clock signal to output a first delayed clock signal; a second delay line for delaying a second clock signal in synchronization with a second edge of the external clock to output a second delayed clock signal; a duty cycle corrector (DCC) for mixing phases of the first and second delayed clock signals to output a DLL clock signal with a corrected duty cycle; and a DCC controller for disabling the duty cycle corrector in a section during which a phase difference between the first and second delayed clock signals is greater than a preset time after a delay locking.