The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 03, 2010
Filed:
Jun. 04, 2008
Masato Maede, Takatsuki, JP;
Naoki Nojiri, Osaka, JP;
Masahiro Gion, Muko, JP;
Shinji Kinuyama, Takatsuki, JP;
Daisuke Matsuoka, Takatsuki, JP;
Shiro Usami, Kyoto, JP;
Masato Maede, Takatsuki, JP;
Naoki Nojiri, Osaka, JP;
Masahiro Gion, Muko, JP;
Shinji Kinuyama, Takatsuki, JP;
Daisuke Matsuoka, Takatsuki, JP;
Shiro Usami, Kyoto, JP;
Panasonic Corporation, Osaka, JP;
Abstract
In a level shift circuit, the threshold voltage of N-type high-voltage transistors, to whose gates the voltage of a low-voltage supply VDD is applied, is set low. An input signal IN powered by the low-voltage supply VDD is input to the gate of an N-type transistor by way of an inverter. Therefore, even if the potentials at nodes Wand Wexceed the voltage of the low-voltage supply VDD, reverse current flow from the nodes Wand Wvia parasitic diodes within the inverters into the low-voltage supply VDD is prevented. A protection circuit, composed of N-type transistor whose respective gates are fixed to the low-voltage supply VDD, is disposed between the two N-type high-voltage transistors N, Nand two N-type low-voltage transistors N, Nfor receiving the complementary signals IN and XIN, thereby preventing the breakdown of those N-type complementary-signal-receiving transistors.