The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 03, 2010

Filed:

Jun. 05, 2007
Applicants:

Kevin Jang, Santa Clara, CA (US);

Bill Phan, San Jose, CA (US);

Helmut Puchner, Santa Clara, CA (US);

Inventors:

Kevin Jang, Santa Clara, CA (US);

Bill Phan, San Jose, CA (US);

Helmut Puchner, Santa Clara, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/735 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor topography and a method for forming a drain extended metal oxide semiconductor (DEMOS) transistor is provided. The semiconductor topography includes at least a portion of an extended drain contact region formed within a well region and a plurality of dielectrically spaced extension regions interposed between the well region and a channel region underlying a gate structure of the topography. The channel region of a first conductivity type and the well region of a second conductivity type opposite of the first conductivity type. In addition, the plurality of dielectrically spaced extension regions and the extended drain contact region are of the second conductivity type. Each of the plurality of dielectrically spaced extension regions has a lower net concentration of electrically active impurities than the well region. Moreover, the extended drain contact region has a greater net concentration of electrically active impurities than the well region.


Find Patent Forward Citations

Jang, Kevin. (2010). Drain extended mos transistor with increased breakdown voltage (U.S. Patent No. 7768068). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7768068

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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