The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7761819 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 20, 2010

Filed:

Jul. 02, 2007
Applicants:

Yue Yang, Cupertino, CA (US);

Marko P. Chew, Palo Alto, CA (US);

Inventors:

Yue Yang, Cupertino, CA (US);

Marko P. Chew, Palo Alto, CA (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

Integrated circuit mask layouts are modified for the purpose of migration to abide a new set of design rules, or for the purpose of optimization for timing, power, signal integrity and manufacturability, among other purposes. The modified layout is required to satisfy a set of constraints generated from design rules, electrical specifications, user specifications among other requirements. The present invention provides a system and a method of representing constraint sets, each of which consists of two or more sets of constraints that are mutually exclusive to each other. In the preferred embodiment, one method of formulation is presented, and a method of solving the layout modification problem under the constraint sets is presented.


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Yang, Yue. (2010). System and method of modification of integrated circuit mask layout (U.S. Patent No. 7761819). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7761819

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