The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 20, 2010
Filed:
Feb. 16, 2007
Tassanee Payakapan, Toronto, CA;
Ismed D. Hartanto, Castro Valley, CA (US);
Shahin Toutounchi, Pleasanton, CA (US);
Tassanee Payakapan, Toronto, CA;
Ismed D. Hartanto, Castro Valley, CA (US);
Shahin Toutounchi, Pleasanton, CA (US);
XILINX, Inc., San Jose, CA (US);
Abstract
A circuit may be used for testing for faults in a programmable logic device. The circuit may include a clock generator coupled to receive a reference clock signal and generate a high speed clock signal; a circuit under test coupled to receive selected pulses of the high speed clock signal; and a programmable shift register coupled to receive a pulse width selection signal and generate an enable signal for selecting the pulses the high speed clock signal, wherein the pulse width of the enable signal is selected based upon the value of the pulse width selection signal. A method of testing for faults in a programmable logic device is also disclosed.