The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7761728 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 20, 2010

Filed:

Jan. 23, 2007
Applicants:

Brian James Cagno, Tucson, AZ (US);

Kenny Nian Gan Qiu, Tucson, AZ (US);

Donald Scott Smith, Tucson, AZ (US);

Inventors:

Brian James Cagno, Tucson, AZ (US);

Kenny Nian Gan Qiu, Tucson, AZ (US);

Donald Scott Smith, Tucson, AZ (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/08 (2006.01);
U.S. Cl.
CPC ...
Abstract

An apparatus, system, and method are disclosed for resetting an inter-integrated circuit data line with a clock line. A hang module detects that a data line that carries data between an I2C bus master and an I2C bus slave is hung, wherein the I2C bus master and I2C bus slave communicate over the data line and a clock line that carries a clock signal. The clock module increases a clock line frequency to a specified frequency in response to the detected data line hang. The pulse generation module transmits specified clock pulses from the I2C bus master to the I2C bus slave over the clock line at the specified increased frequency in response to the detected data line hang. A frequency detector module detects clock pulses at the specified increased frequency. A timer module detects the specified clock pulses at the specified increased frequency. A reset module resets the I2C bus slave in response detecting the specified clock pulses.


Find Patent Forward Citations

Cagno, Brian. (2010). Apparatus, system, and method for resetting an inter-integrated circuit data line with a clock line (U.S. Patent No. 7761728). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7761728

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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