The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 20, 2010
Filed:
Oct. 20, 2008
David Vinke, Happy Valley, OR (US);
Michael N. Dillon, Richfield, MN (US);
Bret Alan Oeltjen, Elko, MN (US);
Uday Anumalachetty, Apple Valley, MN (US);
Thomas Mathews Antisseril, San Ramon, CA (US);
David Vinke, Happy Valley, OR (US);
Michael N. Dillon, Richfield, MN (US);
Bret Alan Oeltjen, Elko, MN (US);
Uday Anumalachetty, Apple Valley, MN (US);
Thomas Mathews Antisseril, San Ramon, CA (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
An integrated circuit structure for distributing power to one or more standard cells in an integrated circuit includes a first plurality of standard cells and a power mesh power connection structure coupled to the cells. Each of the standard cells includes first and second power rails adapted for connection to a voltage supply and a voltage return, respectively, of the standard cells. Each standard cell in a subset of the standard cells is arranged in direct abutment with at least two other standard cells, and at least first and second end cells are arranged in direct abutment with at least one other standard cell of the first plurality of standard cells. The power mesh power connection structure includes a plurality of conductive elements formed in a plurality of different conductive layers in the integrated circuit. The power mesh power connection structure is operative to connect the first and second power rails of the first plurality of standard cells to the voltage supply and voltage return, respectively, and is configured so as to reduce a first voltage differential between respective first power rails of the standard cells and to reduce a second voltage differential between respective second power rails of the standard cells.