The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 20, 2010

Filed:

Dec. 31, 2007
Applicants:

Michael James Tooher, Mountain View, CA (US);

Prakash Ravikumar Bhatia, Fremont, CA (US);

Inventors:

Michael James Tooher, Mountain View, CA (US);

Prakash Ravikumar Bhatia, Fremont, CA (US);

Assignee:

Virage Logic Corp., Fremont, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

In one embodiment, a static random access memory (SRAM) is operable with first voltage and second voltages and includes a plurality of SRAM cells arranged in rows and columns, each SRAM cell being coupled to a respective wordline, respective complementary bitlines, and a source line and a control circuit connected between the source line and the second voltage. The control circuit is selectively operable in a working mode in which data in the plurality of SRAM cells can be accessed, a sleep mode is which data is retained but leakage is reduced and a shutdown mode in which the source line is allowed to float to a level that is substantially equal to the first voltage.


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