The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 20, 2010
Filed:
Nov. 28, 2006
Jae-young Lee, Yongin-si, KR;
Won-sang Park, Yongin-si, KR;
Hae-young Yun, Suwon-si, KR;
Sang-woo Kim, Suwon-si, KR;
Jae-ik Lim, Seoul, KR;
Seung-kyu Lee, Suwon-si, KR;
Chang-woo Shim, Seoul, KR;
Yong-suk Yeo, Jecheon-si, KR;
Ji-youn Choi, Yongin-si, KR;
Jae-Young Lee, Yongin-si, KR;
Won-Sang Park, Yongin-si, KR;
Hae-Young Yun, Suwon-si, KR;
Sang-Woo Kim, Suwon-si, KR;
Jae-Ik Lim, Seoul, KR;
Seung-Kyu Lee, Suwon-si, KR;
Chang-Woo Shim, Seoul, KR;
Yong-Suk Yeo, Jecheon-si, KR;
Ji-Youn Choi, Yongin-si, KR;
Abstract
A panel a gate line on a first substrate, a gate insulating layer covering the gate line, a semiconductor layer on the gate insulating layer, a data line intersecting the gate line and including a source electrode and a drain electrode facing the source electrode on the semiconductor layer, a connection assistant separated from the data line, a passivation layer covering the semiconductor layer and including contact holes exposing the connection assistant and a pixel electrode including a plurality of sub-pixel electrodes and formed on the passivation layer. The sub-pixel electrodes are connected to the connection assistant through the contact holes, are electrically connected to each other through the connection assistant and at least one of the sub-pixel electrodes is electrically connected to the drain electrode.