The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 20, 2010
Filed:
May. 05, 2008
Masaki Sano, Kanagawa, JP;
Masaki Sano, Kanagawa, JP;
NEC Electronics Corporation, Kawasaki, Kanagawa, JP;
Abstract
A multiphase clock with high resolution is generated. A first clock generator circuit () includes n level converters BUFs that conduct level conversion on two input signals, and generate a pair of pulse signals that switch the levels with reference to a crossing point at which the two signal are identical in level with each other. An i-th BUF in the first clock generator circuit () inputs a one-side output pair that is respective one-side outputs of the differential outputs of two i-th (1≦i≦n) and (i+1)-th (1 when i=n) differential circuits in a ring oscillatorin which n differential circuits DCELs having differential inputs and outputs are connected in a ring configuration. The one-side output pair is two one-side outputs that are input to the noninverting terminal of the next differential circuit, or the two one-side outputs that are input to the inverting terminal of the next differential circuit.