The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 20, 2010

Filed:

Sep. 15, 2008
Applicants:

Michael J. Lowry, Indianapolis, IN (US);

Eric A. Brauer, Avon, IN (US);

Thomas A. Degenkolb, Noblesville, IN (US);

Victor C. M. Wong, Singapore, SG;

Inventors:

Michael J. Lowry, Indianapolis, IN (US);

Eric A. Brauer, Avon, IN (US);

Thomas A. Degenkolb, Noblesville, IN (US);

Victor C. M. Wong, Singapore, SG;

Assignee:

Delphi Technologies, Inc., Troy, MI (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01);
U.S. Cl.
CPC ...
Abstract

A leaded semiconductor power module includes a first heatsink, an electrically insulated substrate thermally coupled to the first heatsink, one or more semiconductor chips, a leadframe substrate, and a second heatsink thermally coupled to the leadframe substrate, the assembly being overmolded with an encapsulant to expose the first heatsink, the second heatsink and peripheral terminals of the leadframe substrate. The semiconductor chips are electrically and structurally coupled to both the insulated substrate and the leadframe substrate, and conductive spacers electrically and structurally couple the insulated substrate to the leadframe substrate.


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