The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7759704 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 20, 2010

Filed:

Oct. 16, 2008
Applicants:

Martin Popp, Dresden, DE;

Till Schloesser, Dresden, DE;

Inventors:

Martin Popp, Dresden, DE;

Till Schloesser, Dresden, DE;

Assignee:

Qimonda AG, Munich, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit including a memory cell array comprises transistors being arranged along parallel active area lines, bitlines, the bitlines being arranged so that an individual one intersects a plurality of the active area lines to form bitline-contacts, respectively, the bitlines being formed as wiggled lines, wordlines being arranged so that an individual one of the wordlines intersects a plurality of the active area lines, and an individual one of the wordlines intersects a plurality of the bitlines, wherein neighboring bitline-contacts, each of which is connected to one of the active area lines, are connected with different bitlines.


Find Patent Forward Citations

Popp, Martin. (2010). Memory cell array comprising wiggled bit lines (U.S. Patent No. 7759704). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7759704

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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