The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 20, 2010

Filed:

Sep. 20, 2008
Applicants:

David Beaulieu, Groton, MA (US);

Neal T. Sullivan, Lunenburg, MA (US);

Inventors:

David Beaulieu, Groton, MA (US);

Neal T. Sullivan, Lunenburg, MA (US);

Assignee:

Arradiance, Inc., Sudbury, MA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/311 (2006.01); H01L 21/31 (2006.01); B31D 3/00 (2006.01); G02B 6/10 (2006.01); C25D 5/48 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of fabricating a microchannel plate includes forming a plurality of pores in a silicon substrate. The plurality of pores is oxidized, thereby consuming silicon at surfaces of the plurality of pores and forming a silicon dioxide layer over the plurality of pores. At least a portion of the silicon dioxide layer is stripped, which reduces a surface roughness of the plurality of pores. A semiconducting layer can be deposited onto the surface of the silicon dioxide layer. The semiconducting layer is then oxidized, thereby consuming at least some of the polysilicon or amorphous silicon layer and forming an insulating layer. Resistive and secondary electron emissive layers are then deposited on the insulating layer by atomic layer deposition.


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