The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 20, 2010
Filed:
Jul. 11, 2008
Ryohei Tamura, Chino, JP;
Tomoyuki Shindo, Fujimi-machi, JP;
Hironori Ota, Chino, JP;
Kazuo Yazawa, Suwa, JP;
Ryohei Tamura, Chino, JP;
Tomoyuki Shindo, Fujimi-machi, JP;
Hironori Ota, Chino, JP;
Kazuo Yazawa, Suwa, JP;
Seiko Epson Corporation, Tokyo, JP;
Abstract
A semiconductor chip housing tray that is used in a state of being stacked in a plurality of stages and houses a plurality of semiconductor chips, includes: a base plate; a plurality of upper surface protruding parts provided to an upper surface of the base plate and dividing the upper surface of the base plate into a plurality of first semiconductor chip housing areas; and a plurality of under surface protruding parts provided to an under surface of the base plate and dividing the under surface of the base plate into a plurality of second semiconductor chip housing areas. In the semiconductor chip housing tray, a margin width of the first semiconductor chip housing areas with respect to the semiconductor chips is smaller than a margin width of the second semiconductor chip housing areas with respect to the semiconductor chips.