The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 13, 2010
Filed:
Nov. 12, 2004
Hiroshi Miyazaki, Kasugai, JP;
Hiroshi Miyazaki, Kasugai, JP;
Fujitsu Semiconductor Limited, Yokohama, JP;
Abstract
To present a logic description library of differential input circuit capable of expressing logically, in a differential input circuit, by including an input and output response characteristic depending on the voltage level of individual differential input signals in addition to an input and output response characteristic depending on the differential voltage between differential input signals. A logic description libraryincludes first detection logic primitive DPRand output control logic primitive OPR. A tristate buffer TBF functions as a buffer when first detection signal ISis at low level, and is controlled in a floating state when first detection signal ISis at high level. When at least either positive side logic input signal DINP or negative side logic input signal DINM is at undefined level, the first detection signal ISissued from inverter INVis at undefined level. Hence, output expectation value DOUT issued from output control logic primitive OPR is at undefined level.