The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 13, 2010
Filed:
Aug. 11, 2006
Clark M. O'niell, White Plains, NY (US);
Joseph A. Perrie, Iii, Austin, TX (US);
Steven L. Roberts, Cedar Park, TX (US);
Christopher J. Spandikow, Austin, TX (US);
Clark M. O'Niell, White Plains, NY (US);
Joseph A. Perrie, III, Austin, TX (US);
Steven L. Roberts, Cedar Park, TX (US);
Christopher J. Spandikow, Austin, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A cache replacement system for extending the debugging capabilities of accelerated simulation by enabling enhanced cache data and state checking is provided. The system includes a Cell Broadband Engine Architecture (CBEA) compliant system implementing Replacement Management Tables in an accelerated simulation environment. The RMTs control cache replacement and allow the software to direct entries with specific address ranges at a particular subset of the cache. The RMTs further allow for locking data in the cache and are utilized to prevent overwriting data in the cache by directing data that is known to be used only once at a particular set. Using the locking mechanism in an accelerated simulation environment, a user is able to run code sets, which, when the microprocessor system being tested is correctly designed, generates identical and verifiable data and cache states in each of the different sets of the cache.