The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 13, 2010

Filed:

Aug. 19, 2007
Applicants:

Ming-tsung Wang, Keelung, TW;

Chih-chung Liu, Changhua County, TW;

Yueh-ping Chang, Kaohsiung, TW;

Meng-chieh Tai, Yilan County, TW;

Inventors:

Ming-Tsung Wang, Keelung, TW;

Chih-Chung Liu, Changhua County, TW;

Yueh-Ping Chang, Kaohsiung, TW;

Meng-Chieh Tai, Yilan County, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G02F 1/136 (2006.01); G02F 1/1343 (2006.01);
U.S. Cl.
CPC ...
Abstract

A pixel structure includes a gate, a source, a first drain, a second drain, a third drain, a first pixel electrode, a second pixel electrode, a scan line and a data line. The gate, the source and the first drain form a first thin film transistor. The gate, the source and the second drain form a second thin film transistor. The gate, the second drain and the third drain form a sub-thin film transistor (sub-TFT). Additionally, the first pixel electrode is electrically connected to the first drain, and the second drain extends to a portion between the second pixel electrode and the substrate such that a capacitor-coupling electrode is formed. Moreover, the second pixel electrode is electrically connected to the third drain of the sub-TFT. The scan line is disposed on the substrate and electrically connected to the gate, and the data line is electrically connected to the source.


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