The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 06, 2010
Filed:
Feb. 07, 2007
Ken Namura, Kanagawa-ken, JP;
Sanae Seike, Kanagawa-ken, JP;
Toshihiko Yokota, Kyoto, JP;
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method and integrated circuit for LSSD testing. The integrated circuit includes a plurality of clock domains supplied with test clocks from separate clock generation circuits. In each clock domain, a scan latch at a clock domain boundary receiving an input from another clock domain includes a master latch for latching an input in response to a first clock, a slave latch for latching an output from the master latch in response to a second clock, a selector for supplying the master latch with a system input when the mode selection signal is at a second level, and a clock control circuit for turning off the first clock when the mode selection signal transits from the first level to the second level.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile