The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 06, 2010
Filed:
Feb. 13, 2008
Yoshitaka Izawa, Kanagawa, JP;
Yoshikazu Yabe, Kanagawa, JP;
Yoshitaka Izawa, Kanagawa, JP;
Yoshikazu Yabe, Kanagawa, JP;
NEC Electronics Corporation, Kanagawa, JP;
Abstract
Occurrence and propagation of glitches caused by changing the path layout are suppressed, thereby reducing the power consumption. An array-type processor comprises a plurality of processor elements and can change the path layout relating to data transmission/reception between the processor elements depending on clock cycle. Each processor element comprises a layout information memorythat stores a layout information indicating signal relating to the layout of the paths, a delay adjusting circuitthat adjusts the timing of a layout information indicating signal Pin outputted from the layout information memoryat every clock cycle, and a wiring connection circuitthat changes a path to at least one of the other processor elements (PE) or function unit(s) (a register file unitand an arithmetic logic unit) based on a layout information indicating signal Pout whose timing has been adjusted.