The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 06, 2010
Filed:
Jan. 06, 2009
Mark David Bellows, Rochester, MN (US);
Paul Allen Ganfield, Rochester, MN (US);
Kent Harold Haselhorst, Byron, MN (US);
Ryan Abel Heckendorf, Rochester, MN (US);
Tolga Ozguner, Rochester, MN (US);
Mark David Bellows, Rochester, MN (US);
Paul Allen Ganfield, Rochester, MN (US);
Kent Harold Haselhorst, Byron, MN (US);
Ryan Abel Heckendorf, Rochester, MN (US);
Tolga Ozguner, Rochester, MN (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Managing write-to-read turnarounds in an early read after write memory system is presented. Memory controller logic identifies a write operation's bank set, allows a different bank set read operation to issue prior to the write operation's completion, and allows a same bank set read operation to issue once the write operation completes. The memory controller includes operation counter logic, operation selection logic, operation acceptance logic, command formatting logic, and memory interface logic. The operation counter logic receives new-operation-related signals from the operation acceptance logic and, in turn, provides signals to the operation selection logic and the operation acceptance logic as to when to issue a read operation that corresponds to either an even DRAM bank or an odd DRAM bank.