The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 06, 2010
Filed:
Jan. 09, 2004
Indrajit Rajeev Gajendran, Saratoga, CA (US);
Biju Raghaven Nair, Sunnyvale, CA (US);
Kirk Dow Sanders, San Jose, CA (US);
Indrajit Rajeev Gajendran, Saratoga, CA (US);
Biju Raghaven Nair, Sunnyvale, CA (US);
Kirk Dow Sanders, San Jose, CA (US);
Cisco Technology, Inc., San Jose, CA (US);
Abstract
A system on a circuit board includes a plurality of devices designed to access an electronic system on the circuit board, and a programmable logic device (PLD) connected to the plurality of devices. Each of the plurality of devices complies with a test port architecture. The PLD interfaces the plurality of devices with a test port. The PLD is capable of configuring different connectivity among the plurality of devices based on the program implemented and the assertion of input control signals. A method and apparatus configures a plurality of devices on a circuit board into a desired configuration using the PLD. The configuration includes (a) receiving a control signal at the PLD, (b) configuring at least one of the plurality of devices into a chain based on the control signal, and (c) coupling the configured chain to the test port via the PLD.