Lateral planar type power semiconductor device including drain buried region immediately below drain region and its manufacturing method

Abstract

In a power semiconductor device including a semiconductor substrate of a first conductivity type, a source region of a second conductivity type formed in a surface portion of the semiconductor substrate, and a drain drift region of the second conductivity type formed in the surface portion of the semiconductor substrate, the drain drift region being apart from the source region, a drain region of the second conductivity type is formed in a surface portion of the drain drift region. The drain region has a larger impurity concentration than the drain drift region. A drain buried region of the second conductivity type is formed immediately below the drain region in the drain drift region. The drain buried region has a larger impurity diffusion region than the drain drift region. A gate insulating layer is formed on the semiconductor substrate between the source region and the drain drift region, and a gate electrode is formed on the gate insulating layer.