The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 29, 2010

Filed:

Jan. 23, 2009
Applicants:

Takami Hikita, Ibaraki, JP;

Kazunori Mune, Ibaraki, JP;

Toshiki Naitou, Ibaraki, JP;

Yasunari Ooyabu, Ibaraki, JP;

Inventors:

Takami Hikita, Ibaraki, JP;

Kazunori Mune, Ibaraki, JP;

Toshiki Naitou, Ibaraki, JP;

Yasunari Ooyabu, Ibaraki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/12 (2006.01); G02B 6/10 (2006.01); B29D 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of manufacturing an opto-electric hybrid board which is capable of reducing the number of steps for the manufacture of the opto-electric hybrid board and which achieves the reduction in thickness of the opto-electric hybrid board to be manufactured, and an opto-electric hybrid board obtained thereby. A resist layer is formed on a core-forming resin layer, and is then formed into a predetermined pattern. Resultant portions of the core-forming resin layer serve as cores (optical interconnect lines). Next, a thin metal filmis formed on the under cladding layerso as to cover the resist layer and the cores. Thereafter, the resist layer is removed together with portions of the thin metal filmlying on the surface of the resist layer. Electroplating is performed on the remaining portions of the thin metal filmto fill groovesdefined between adjacent ones of the coreswith electroplated layersobtained by the electroplating. The electroplated layersserve as electrical interconnect lines


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