The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 29, 2010
Filed:
Dec. 10, 2004
Valeri Dimitrov Ivanov, Sofia, BG;
Hartmut Liebing, Erfurt, DE;
Valeri Dimitrov Ivanov, Sofia, BG;
Hartmut Liebing, Erfurt, DE;
X-Fab Semiconductor Foundries AG, Erfurt, DE;
Abstract
The invention concerns semiconductor latches capable of memorizing any programmed information even after power supply has been removed. Used is a μm BiCMOS EPROM process but it is applicable in any other process having hot electron injection devices like EPROM, Flash EEPROM. Suggested is a bi-stable latch circuit having a pair of cross-coupled branches (I,II), each branch including a complementary driver and a load connected between a drain line and a source line and a non-volatile memory cell having a program transistor and a read transistor, at least one of said drivers and loads including said read transistor, said driver and load of said branch connected in series at a respective output node, said read transistor and program transistor having a common floating gate and separate control gates, said control gate of said program transistor connected to a program voltage, the drain of said program transistor connected to a respective input node, said control gate of said read transistor in said branch connected to said output node of the other branch (II).