The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 29, 2010
Filed:
Aug. 15, 2007
Woo-seok Kim, Suwon-si, KR;
Woo-Seok Kim, Suwon-si, KR;
Samsung Electronics Co., Ltd., Suwon-Si, KR;
Abstract
A clock multiplier includes a phase-frequency detector, a voltage-current converter, a duty ratio control circuit, a plurality of variable delay cells and an edge combiner. The phase-frequency detector generates control signals. The voltage-current converter converts the control signals to generate first and second current control voltages. The duty ratio control circuit modifies the duty ratio of an input clock signal based on the first and second current control voltages. Each of the variable delay cells generates a triangular wave voltage based on the modified input signal, generates a square wave voltage based on the triangular wave voltage to generate a delay signal. The edge combiner generates a plurality of multiplied clocks based on the delay signals from the variable delay cells.