The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 29, 2010
Filed:
Oct. 29, 2007
Gowrishankar L. Chindalore, Austin, TX (US);
Gowrishankar L. Chindalore, Austin, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A method for integrating Non-Volatile Memory (NVM) circuitry with logic circuitry is provided. The method includes depositing a first layer of gate material over the NVM area and the logic area of the substrate. The method further includes depositing multiple adjoining sacrificial layers comprising nitride, oxide and nitride (ARC layer) overlying each other. The multiple adjoining sacrificial layers are used to pattern select gate and control gate of memory transistor in the NVM area, and the ARC layer of the multiple adjoining sacrificial layers is used to pattern gate of logic transistor in the logic area.