The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 22, 2010
Filed:
Oct. 08, 2008
David Cousinard, Morges, CH;
Philippe Mosch, Le Mont-sur-Lausanne, CH;
Lydi Smaini, St. Julien en Genevois, FR;
Randy Tsang, Foster City, CA (US);
Cao-thong Tu, Lausanne, CH;
Miljan Vuletic, Lausanne, CH;
David Cousinard, Morges, CH;
Philippe Mosch, Le Mont-sur-Lausanne, CH;
Lydi Smaini, St. Julien en Genevois, FR;
Randy Tsang, Foster City, CA (US);
Cao-Thong Tu, Lausanne, CH;
Miljan Vuletic, Lausanne, CH;
Marvell International Ltd., Hamilton, BM;
Abstract
Circuits and methods for frequency modulation (FM) using a digital frequency-locked loop (DFLL). A digitally controlled oscillator (DCO) generates and adjusts a frequency of a modulated signal based on a digital tuning word. A DFLL control logic circuit receives a feedback of the modulated signal and generates a carrier signal word. A sigma delta modulator circuit receives an input signal and applies dithering to produce a dithered input signal word. An adder circuit receives and sums the dithered input signal word and the carrier signal word to produce the digital tuning word. The DFLL control logic circuit adjusts the carrier signal word to lock a carrier frequency of the modulated signal.