The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 22, 2010
Filed:
Jun. 08, 2007
Ken Nakahara, Kyoto, JP;
Hiroyuki Yuji, Kyoto, JP;
Kentaro Tamura, Kyoto, JP;
Shunsuke Akasaka, Kyoto, JP;
Masashi Kawasaki, Miyagi, JP;
Atsushi Tsukazaki, Miyagi, JP;
Akira Ohtomo, Miyagi, JP;
Ken Nakahara, Kyoto, JP;
Hiroyuki Yuji, Kyoto, JP;
Kentaro Tamura, Kyoto, JP;
Shunsuke Akasaka, Kyoto, JP;
Masashi Kawasaki, Miyagi, JP;
Atsushi Tsukazaki, Miyagi, JP;
Akira Ohtomo, Miyagi, JP;
Rohm Co., Ltd., Kyoto-fu, JP;
Abstract
Provided is a ZnO-based semiconductor device capable of growing a flat ZnO-based semiconductor layer on an MgZnO substrate having a main surface on the lamination side oriented in a c-axis direction. ZnO-based semiconductor layerstoare epitaxially grown on an MgZnO (0≦x<1) substratehaving a +C surface (0001), as a main surface, inclined at least in an m-axis direction. A p-electrodeis formed on the ZnO-based semiconductor layer, and an n-electrodeis formed on the underside of the MgZnO substrate. Thereby, steps regularly arranged in the m-axis direction can be formed on the surface of the MgZnO substrate, and a phenomenon called step bunching is prevented. Consequently, the flatness of a film of the semiconductor layers laminated on the substratecan be improved.