The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7739484 B1

PDF
Full Text
Expired
Date of Patent:
Jun. 15, 2010

Filed:

Oct. 05, 2007
Applicants:

Kevin D. Kissell, Le Bar sur Loup, FR;

Hartvig W. J. Ekner, Ballerup, DK;

Inventors:

Kevin D. Kissell, Le Bar sur Loup, FR;

Hartvig W. J. Ekner, Ballerup, DK;

Assignee:

MIPS Technologies, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and apparatus provide means for saving and restoring processor register values and allocating and deallocating stack memory. A first field of a save instruction encodes whether a value in a register of a processor is saved as a static value. A second field of the save instruction encodes whether a value in a register of a processor is saved as an argument value. A third field of the save instruction encodes a size of a stack frame created during execution of the save instruction. An argument value is saved in a calling program's stack frame. A static value is saved in a called program's stack frame. A restore instruction is used to restore static values and deallocate the stack frame. The save and restore instructions may be executed using any programmable device, including a single instruction set architecture processor or a multi-instruction set architecture processor.


Find Patent Forward Citations

Kissell, Kevin. (2010). Instruction encoding to indicate whether to store argument registers as static registers and return address in subroutine stack (U.S. Patent No. 7739484). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7739484

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