Erase discharge control method of nonvolatile semiconductor memory device

Abstract

According to an example embodiment, an erase discharge method may include drawing charges accumulated in a floating gate of a floating gate type field effect transistor into a semiconductor substrate to perform an erase operation by applying a first voltage to a word line, a second voltage to an N-well and a P-well, and/or opening a bit line and a ground line. The word line may be grounded, and a discharge transistor connected to the bit line may be turned on. The N-well and the P-well may be grounded to discharge charges accumulated in the N-well and P-well.