The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 15, 2010

Filed:

Aug. 29, 2008
Applicants:

Stephen Summerfield, San Jose, CA (US);

Christopher H. Dick, San Jose, CA (US);

Inventors:

Stephen Summerfield, San Jose, CA (US);

Christopher H. Dick, San Jose, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/26 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit having a circuit for reducing distortion in a power amplifier is disclosed. The integrated circuit comprises a predistortion circuit coupled to receive a signal to be amplified; sample capture buffers coupled to an output of the predistortion circuit and an input/output port of the integrated circuit; and an estimator circuit coupled to the sample capture buffers, wherein the estimator circuit generates parameters for the predistortion circuit based upon the output of the predistortion circuit and an output of the power amplifier received at the input/output port of the integrated circuit. A method of reducing distortion in a power amplifier is also disclosed.


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