The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 15, 2010
Filed:
Sep. 08, 2006
Harumi Kawano, Miyazaki, JP;
Osamu Kuroki, Miyazaki, JP;
Harumi Kawano, Miyazaki, JP;
Osamu Kuroki, Miyazaki, JP;
Oki Semiconductor Co., Ltd., Tokyo, JP;
Abstract
A bias generation circuit is between a power voltage node and ground voltage node at a far end from power voltage and ground voltage terminals. Reference voltage nodes are connected to an amplifier circuit block from the far end. The amplifier block is closer to the power supply source, and the bias generation circuit is distant therefrom. Even if the power supply voltage drops due to current constantly flowing in the amplification block and bias generation circuit, the bias generation circuit generates reference voltages at the reference voltage nodes based on the voltage-dropped power supply. Therefore, the voltage in the constant current source MOS transistor of the amplifier block becomes lowest at the amplifier circuit closest to the bias generation circuit. The response speeds of other amplifier circuits do not drop if the circuit is designed based on the amplifier closest to the bias generation circuit.