The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 15, 2010
Filed:
Nov. 27, 2007
Jin-gook Kim, Suwon-si, KR;
Seung-jun Bae, Daejeon, KR;
Dae-hyun Chung, Daejeon, KR;
Abstract
A level shifter of a semiconductor device and method of controlling a duty ratio are provided. The level shifter includes first and second PMOS transistors having sources to which a power supply voltage is applied, first and second NMOS transistors having sources to which a ground voltage is applied, third and fourth NMOS transistors having sources connected to drains of the first and second NMOS transistors and gates to which the power supply voltage is applied; and a voltage controlled delay unit for receiving an input signal applied to a gate of the first NMOS transistor, inverting a level of the input signal, determining whether a voltage of an inverted input signal should be charged in response to a voltage control signal, outputting the voltage of the inverted input signal of which delay time is controlled, and applying the inverted input signal to a gate of the second NMOS transistor.