Hybrid class ab super follower

Abstract

Various embodiments of a hybrid class AB super follower circuit are provided. One embodiment is a follower circuit comprising: an input node for receiving an input voltage signal; an output node for driving a capacitive load based on the input voltage signal; a transistor Mhaving a gate terminal connected to the input node for receiving the input voltage signal, a source terminal connected to the output node, and a drain terminal; a feedback loop comprising a second transistor M, a third transistor Mand a fourth transistor M, wherein: the gate and source terminals of the second transistor Mare connected to a current source I, and the drain terminal of the second transistor Mis connected to the output node; the source terminal of the third transistor Mis connected to the current source Iand the drain terminal of the third transistor Mis connected to a current source I; the gate terminal of the fourth transistor Mis connected to the drain terminal of the third transistor M, the drain terminal of the fourth transistor Mis connected to the output node, and the source terminal of the fourth transistor Mis connected to a ground; and a replica bias circuit for providing a voltage bias signal to the gate terminal of the third transistor.