The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 08, 2010
Filed:
Dec. 08, 2008
Shawn Xianggang Yu, Austin, TX (US);
Terry L. Sculley, Lewisville, TX (US);
Shawn Xianggang Yu, Austin, TX (US);
Terry L. Sculley, Lewisville, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A clock signal generator () includes a phase locked loop (PLL) circuit () which requires a reference clock signal of at least a predetermined first frequency (f). A first clock signal (REFCLK) of a second frequency (f) that is substantially lower than the first frequency (f) is multiplied so as to produce a second clock signal (DIGCLK) which has a frequency at least as high as the first frequency (f) and which is phase-locked with respect to the first clock signal (REFCLK). The second clock signal (DIGCLK) is applied to a reference signal input of the PLL circuit (), which produces an output clock signal (PLLCLK or CLKOUT).