The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 08, 2010

Filed:

Feb. 23, 2009
Applicants:

Hiromu Kato, Kanagawa, JP;

Masahiro Takeuchi, Kanagawa, JP;

Inventors:

Hiromu Kato, Kanagawa, JP;

Masahiro Takeuchi, Kanagawa, JP;

Assignee:

NEC Electronics Corporation, Kawasaki, Kanagawa, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 17/16 (2006.01); H03K 19/003 (2006.01);
U.S. Cl.
CPC ...
Abstract

Disclosed is an impedance adjustment circuit including a comparator and a resistor control circuit. The comparator compares the resistance value of an external resistor and that of a replica resistor that forms a replica of a terminal resistor. The resistor control circuit includes a replica resistor control counter, a resistor-under-adjustment control signal holding circuit and a monitor circuit. The replica resistor control counter counts up and down based on the comparison result by the comparator to output a control signal to the replica resistor. The resistor-under-adjustment control signal holding circuit holds a control signal that is delivered to the terminal resistor. The monitor circuit receives the state of the counter and an output of the retention circuit and, in case the difference between the count state of the replica resistor control counter and an output of the resistor-under-adjustment control signal holding circuit is within a preset range, delivers the output of the resistor-under-adjustment control signal holding circuit as an input to the resistor-under-adjustment control signal holding circuit.


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