The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 08, 2010

Filed:

Oct. 01, 2007
Applicants:

James R. Sheats, Palo Alto, CA (US);

Sam Kao, San Mateo, CA (US);

Gregory A. Miller, Mountain View, CA (US);

Martin R. Roscheisen, San Francisco, CA (US);

Inventors:

James R. Sheats, Palo Alto, CA (US);

Sam Kao, San Mateo, CA (US);

Gregory A. Miller, Mountain View, CA (US);

Martin R. Roscheisen, San Francisco, CA (US);

Assignee:

Nanosolar, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Series interconnection of optoelectronic device modules is disclosed. Each device module includes an active layer disposed between a bottom electrode and a transparent conducting layer. An insulating layer is disposed between the bottom electrode of a first device module and a backside top electrode of the first device module. One or more vias are formed through the active layer, transparent conducting layer and insulating layer of the first device module. Sidewalls of the vias are coated with an insulating material such that a channel is formed through the insulating material to the backside top electrode of the first device module. The channel is at least partially filled with an electrically conductive material to form a plug that makes electrical contact between the transparent conducting layer and the backside top electrode of the first device module. Portions of the backside top electrode and insulating layer of a second device module are cut back to expose a portion of the bottom electrode of the second device module. The first and second device modules are attached to an insulating carrier substrate. Electrical contact is made between the backside top electrode of the first device module and the exposed portion of the bottom electrode of the second device module.


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