The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 25, 2010
Filed:
Jan. 28, 2009
Brian P. Deskin, Vestal, NY (US);
William E. Hall, Clinton, CT (US);
David W. Pruden, Endwell, NY (US);
Brian P. Deskin, Vestal, NY (US);
William E. Hall, Clinton, CT (US);
David W. Pruden, Endwell, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method and eFuse circuit for implementing enhanced security features using eFuses, such as disabling selected predefined test, debug, and mission security functions used in application-specific integrated circuits (ASICs), and a design structure on which the subject circuit resides are provided. The eFuse circuit includes a plurality of eFuses, a sense amplifier coupled to the plurality of eFuses, and a plurality of sense output latches coupled to the sense amplifier. The plurality of sense output latches is arranged to have a bias to power up to a known value. Control logic coupled to the plurality of sense output latches provides at least one predefined control signal responsive to the known value of the plurality of sense output latches, which enables a selected predefined security function. The plurality of eFuses is sensed and the ASIC is configured to a predefined state responsive to an applied POR/Sense control signal.