The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 25, 2010
Filed:
May. 22, 2008
Mitsuo Saitoh, Osaka, JP;
Masashi Morita, Osaka, JP;
Satoshi Maeshima, Hyogo, JP;
Hideki Yamashita, Osaka, JP;
Tsutomu Fujii, Osaka, JP;
Nobuyuki Kamikihara, Nara, JP;
Mitsuo Saitoh, Osaka, JP;
Masashi Morita, Osaka, JP;
Satoshi Maeshima, Hyogo, JP;
Hideki Yamashita, Osaka, JP;
Tsutomu Fujii, Osaka, JP;
Nobuyuki Kamikihara, Nara, JP;
Panasonic Corporation, Osaka, JP;
Abstract
The present invention provides a front panel for a plasma display panel which can suppress the incidence of chipping of the barrier rib of a rear panel for a PDP, can enhance the stability of initial electron emission in a dielectric layer, and can reduce a voltage required for maintaining a wall charge. The front panel for a plasma display panel includes a substrate, a plurality of electrodes formed on the substrate, a dielectric layer formed to cover the respective electrodes and the substrate, a dielectric-protection layer formed to cover the dielectric layer, and powder components dispersed on the dielectric-protection layer, wherein an annealed layer having a thickness of 10 to 300 nm is formed on at least the exposed surface of each of the powder components, wherein said exposed surface does not contact the dielectric-protection layer.