The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 18, 2010
Filed:
Jan. 20, 2006
Brian Joseph Kopec, Cary, NC (US);
Victor Roberts Augsburg, Cary, NC (US);
James Norris Dieffenderfer, Apex, NC (US);
Jeffrey Todd Bridges, Raleigh, NC (US);
Thomas Andrew Sartorius, Raleigh, NC (US);
Brian Joseph Kopec, Cary, NC (US);
Victor Roberts Augsburg, Cary, NC (US);
James Norris Dieffenderfer, Apex, NC (US);
Jeffrey Todd Bridges, Raleigh, NC (US);
Thomas Andrew Sartorius, Raleigh, NC (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
A processor having a multistage pipeline includes a TLB and a TLB controller. In response to a TLB miss signal, the TLB controller initiates a TLB reload, requesting address translation information from either a memory or a higher-level TLB, and placing that information into the TLB. The processor flushes the instruction having the missing virtual address, and refetches the instruction, resulting in re-insertion of the instruction at an initial stage of the pipeline above the TLB access point. The initiation of the TLB reload, and the flush/refetch of the instruction, are performed substantially in parallel, and without immediately stalling the pipeline. The refetched instruction is held at a point in the pipeline above the TLB access point until the TLB reload is complete, so that the refetched instruction generates a 'hit' in the TLB upon its next access.