The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 18, 2010

Filed:

Nov. 15, 2004
Applicants:

Dipankar Bhattacharya, Saratoga, CA (US);

Bangalore Priyadarshan, Fremont, CA (US);

Jaushin Lee, Saratoga, CA (US);

François Gautier-le Boulch, Palo Alto, CA (US);

Inventors:

Dipankar Bhattacharya, Saratoga, CA (US);

Bangalore Priyadarshan, Fremont, CA (US);

Jaushin Lee, Saratoga, CA (US);

François Gautier-Le Boulch, Palo Alto, CA (US);

Assignee:

Cisco Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04J 3/06 (2006.01); G06F 1/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A source-synchronous parallel interface divides a wide data bus into clock-groups including a sub-group of the data lines and a clock line carrying a copy of the transmit clock. The traces in a clock-group are located physically close together to minimize skew between the signals carried on the traces of the clock-group. Deskew logic on the receiver compensates for skew between received clock-group signals.


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