The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 18, 2010
Filed:
Aug. 20, 2004
Faisal Dada, Ottawa, CA;
Kari LU, Nepean, CA;
Bryon Moyer, Cupertino, CA (US);
Venkat Yadavalli, Santa Clara, CA (US);
Arye Ziklik, Sunnyvale, CA (US);
Faisal Dada, Ottawa, CA;
Kari Lu, Nepean, CA;
Bryon Moyer, Cupertino, CA (US);
Venkat Yadavalli, Santa Clara, CA (US);
Arye Ziklik, Sunnyvale, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
Integrated circuits compliant with a serial communications protocol with optional features are provided. The optional features include control plane features such as flow control, retry-on-error, clock tolerance compensation, and idle codes and include data path features such as streaming and packetized data modes, configurable data ports and user-defined data channel multiplexing. An integrated circuit compliant with the protocol can transmit streaming data with or without clock tolerance compensation codes. A priority data port can be used to implement retry-on-error functions while user-defined data channels carry user data. The data ports can be individually configured to perform different levels of cyclic redundancy checking. Logic design tools are used to create compliant circuits and systems.