The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 18, 2010
Filed:
Sep. 23, 2008
Scott Gregory Bardsley, Gibsonville, NC (US);
Bryan Scott Puckett, Stokesdale, NC (US);
Michael Ray Elliott, Summerfield, NC (US);
Ravi Kishore Kummaraguntla, Austin, TX (US);
Ahmed Mohamed Abdelatty Ali, Oak Ridge, NC (US);
Carroll Clifton Speir, Pleasant Garden, NC (US);
James Carroll Camp, Greensboro, NC (US);
Scott Gregory Bardsley, Gibsonville, NC (US);
Bryan Scott Puckett, Stokesdale, NC (US);
Michael Ray Elliott, Summerfield, NC (US);
Ravi Kishore Kummaraguntla, Austin, TX (US);
Ahmed Mohamed Abdelatty Ali, Oak Ridge, NC (US);
Carroll Clifton Speir, Pleasant Garden, NC (US);
James Carroll Camp, Greensboro, NC (US);
Analog Devices, Inc., Norwood, MA (US);
Abstract
Signal converter system embodiments are provided to substantially reduce symmetrical and asymmetrical conversion errors. Signal-processing stages of these embodiments may include a signal sampler in addition to successively-arranged signal converters. In system embodiments, injected analog dither signals are initiated in response to a random digital code. They combine with a system's analog input signal and the combined signal is processed down randomly-selected signal-processing paths of the converter system to thereby realize significant improvements in system linearity. Because these linearity improvements are realized by simultaneous processing of the input signal and the injected dither signal, a combined digital code is realized at the system's output. A first portion of this combined digital code corresponds to the analog input signal and a second portion corresponds to the injected analog dither signal. The final system digital code is realized by subtracting out the second portion with a back-end decoder that responds to the random digital code.