The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 18, 2010
Filed:
Nov. 06, 2008
Cheon-oh Lee, Cheonan-si, KR;
Nam-hyun Kim, Yongin-si, KR;
Ki-hong Kim, Hwaseong-si, KR;
Jong-seok Kim, Yongin-si, KR;
Jin-ho OH, Yongin-si, KR;
Cheon-Oh Lee, Cheonan-si, KR;
Nam-Hyun Kim, Yongin-si, KR;
Ki-Hong Kim, Hwaseong-si, KR;
Jong-Seok Kim, Yongin-si, KR;
Jin-Ho Oh, Yongin-si, KR;
Samsung Electronics Co., Ltd., Gyeonggi-do, KR;
Abstract
A short pulse rejection circuit may include an edge detector, a filter circuit, a comparison circuit, and a gating circuit. The edge detector may delay an input signal to generate a delayed input signal, and detect an edge of the input signal to generate an edge detection signal. The filter circuit may perform a low pass filtering on the edge detection signal to generate a first signal. The comparison circuit may compare the first signal with a reference voltage. The gating circuit may gate the delayed input signal based on an output signal of the comparison circuit. Therefore, the short pulse rejection circuit may have a sufficient setup/hold time margin of a flip-flop, and may sample an input signal even when a state of the input signal does not change during an initial operation.