The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 18, 2010
Filed:
Jun. 28, 2007
Amanda L. Tessier, Poughkeepsie, NY (US);
Bryant C. Colwill, Poughkeepsie, NY (US);
Brian L. Tessier, Poughkeepsie, NY (US);
Amanda L. Tessier, Poughkeepsie, NY (US);
Bryant C. Colwill, Poughkeepsie, NY (US);
Brian L. Tessier, Poughkeepsie, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method is provided of forming a conductive via in contact with a bulk semiconductor region of a semiconductor-on-insulator ('SOI') substrate. A first opening is formed in a conformal layer overlying a trench isolation region. The trench isolation region may share an edge with an SOI layer of the substrate. Desirably, a dielectric layer is deposited over a top surface of the conformal layer and the trench isolation region. A second opening can then be formed which extends through the dielectric layer and the first opening in the conformal layer. Desirably, portions of the bulk semiconductor region and the top surface of the conformal layer are exposed within the second opening. The second opening can then be filled with at least one of a metal or a semiconductor to form a conductive element contacting the exposed portions of the bulk semiconductor region and the top surface of the conformal layer.