Comparator with amplitude and time hysteresis

Abstract

A comparator generates lower and upper reference voltages to establish an amplitude hysteresis. A first comparator circuit generates a first comparison signal indicating whether an input signal is above the upper reference voltage. A second comparator circuit generates a second comparison signal indicating whether the input signal is below the lower reference voltage. Further, the first and second comparison signals may be low-pass filtered to establish a time hysteresis. A latch is set to a first state if the first control signal indicates the input signal is above the upper reference voltage. The latch is set to a second state if the second control signal indicates the input signal is below the lower reference voltage. In some embodiments, the comparator has a rail-to-rail common mode input voltage range, a low-power mode of operation, and is self-biased to compensate for temperature, voltage, and process characteristics.