The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 04, 2010
Filed:
Sep. 29, 2006
Zhong You, Austin, TX (US);
Jieren Bian, Austin, TX (US);
Zhong You, Austin, TX (US);
Jieren Bian, Austin, TX (US);
Cirrus Logic, Inc., Austin, TX (US);
Abstract
An apparatus and a method for clock mode determination utilizing SCLK auto-detection and generation circuitry at a serial port which has a reduced number of pin-count by eliminating the need for inputting a master input clock signal MCLK and/or a serial input clock signal SCLK. The SCLK auto-detection and generation circuitry includes a SCLK detector circuit, a serial mode detector circuit, an internal SCLK generator circuit, a multiplexer, and an edge detector circuit. The SCLK detector circuit is used to detect whether an external serial clock signal is present and to generate a selection signal. The serial mode detector is used to detect whether an incoming data signal is in a non-TDM mode or a TDM mode and to generate a mode signal.