The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 04, 2010

Filed:

Dec. 12, 2007
Applicants:

Harry I Linzer, Raleigh, NC (US);

Michael R. Ouellette, Westford, VT (US);

Inventors:

Harry I Linzer, Raleigh, NC (US);

Michael R. Ouellette, Westford, VT (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An approach that manages redundant memory in a voltage island is described. In one embodiment there is a design structure embodied in a machine readable medium used in a design process of a semiconductor device. In this embodiment, the design structure includes one or more voltage islands representing a power cycled region. One or more non-power cycled regions are located about the one or more voltage islands. Each of the one or more non-power cycled regions comprises at least one memory using redundancy and a repair register associated with each memory using redundancy. A redundancy initialization component is coupled to the one or more voltage islands and the one or more non-power cycled regions.


Find Patent Forward Citations

Linzer, Harry. (2010). Managing redundant memory in a voltage island (U.S. Patent No. 7710800). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7710800

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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