The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 04, 2010
Filed:
Apr. 11, 2006
Seamus Paul Whiston, Raheen, IE;
Denis J. Doyle, Patrickwell, IE;
Mike O'shea, Grenagh, IE;
Thomas J. Lawlor, Mallow, IE;
Seamus Paul Whiston, Raheen, IE;
Denis J. Doyle, Patrickwell, IE;
Mike O'Shea, Grenagh, IE;
Thomas J. Lawlor, Mallow, IE;
Analog Devices, Inc., Norwood, MA (US);
Abstract
A method for erasing an EEPROM cell which reduces the need for monitoring algorithms. The potential at the erase gate is initially raised and the potential at the control gate is lowered to cause FN tunneling through the erase gate. A subsequent soft programming step is employed to raise the potential at the control gate to a value sufficient to cause FN tunneling to start though the oxide of the transistor. A new memory device structure suitable for practicing this method employs a transistor having a floating gate, where a data value is stored as charged on the floating gate; a control gate; a control gate capacitor coupling the control gate to the floating gate; an erase gate; an erase gate capacitor coupling the erase gate to the floating gate; and an erase control circuit.