The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 04, 2010
Filed:
Dec. 23, 2008
Hamid Savoj, Los Altos Hills, CA (US);
David Berthelot, Santa Clara, CA (US);
Hamid Savoj, Los Altos Hills, CA (US);
David Berthelot, Santa Clara, CA (US);
Envis Corporation, Santa Clara, CA (US);
Abstract
A circuit Θ is coupled to an individual node N, in a circuit for which repeated logical values of that individual node can be identified as having a set of flip-flops Fdependent thereon, with the effect that if the individual node Nremains unchanged for one or more clock cycles, the set of dependent flip-flops Fcan be disabled for the second and succeeding clock cycles. The circuit Θ conditionally generates a clock-enabling signal Nin response thereto. One such circuit Θ conditionally includes a logical controller, whose output is coupled using a fan-out node to both an input to a state machine and a fan-in logic circuit (such as an AND gate). The flip-flop is clocked normally; its output is coupled to that same fan-in logic circuit, whose output Nis coupled to the set of dependent flip-flops F.